As computer technologies have evolved, demands on a computing device have also evolved. More specifically, many computer applications and/or data streams require the processing of video data. As video data becomes more sophisticated, processing requirements for the video data increases.
Currently, many computing architectures provide a Central Processing Unit (CPU) for processing data, including video and graphics data. While a CPU may provide adequate processing capabilities for some video and graphics, a CPU may also be configured to process other data. As such, the demands on a CPU in processing sophisticated video and graphics, may detrimentally affect performance of the entire system.
Additionally, many computing architectures include one or more Execution Units (EUs) for processing data. More specifically, in at least one configuration, an EU may be configured to process a plurality of different types of data. As with the CPU, the demands on the EUs may be such that processing sophisticated video and graphics data may detrimentally affect performance of the entire computing system. Additionally, processing of sophisticated video and graphics data by the EUs may increase power consumption beyond an acceptable threshold. Further, the institution of different protocols of data may further limit the ability for the EUs to process that video and graphics data. Additionally, many current computing architectures provide 32-bit instructions, which may reduce efficiency, thus affecting processing speed. Further, utilization of a plurality of operations in a single component is also desired.
Thus, a heretofore unaddressed need exists in the industry to address the aforementioned deficiencies and inadequacies.